发明名称 PWM SIGNAL OUTPUT CIRCUIT
摘要 PURPOSE:To suppress the occurrence of strain caused by the variation of an output impedance and to remove the influence of the variation of power source voltage by controlling the outputted current quantity of a PWM circuit by means of a constant-current power circuit, inputting the output from the PWM circuit in a current voltage conversion circuit and fetching the output from the conversion circuit as an PWM output. CONSTITUTION:A titled circuit outputs signals having pulse widths corresponding to the input digital input inputted from the PWM circuit 1. The outputs are made to be such binary signals as the high level of the output is set as logic one and the low level of the output is set as logic zero. The binary signals are supplied to N-type MOS transistor TRT1, which is controlled to be ON or OFF according to the logic level of the binary signals, and the alteration of current which flows in the drain of the TRT1 is inputted in the current voltage conversion circuit 2. The output from the conversion circuit 2 is fetched as the output of the PWM and the alteration of the output impedance from the PWM signal output circuit is suppressed so as to remove the influence of the variation of the power source voltage.
申请公布号 JPS63121312(A) 申请公布日期 1988.05.25
申请号 JP19860266973 申请日期 1986.11.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KANEAKI TETSUHIKO;NURIYA KOZO;TANI YASUNORI
分类号 H03K5/00 主分类号 H03K5/00
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