| 摘要 |
PURPOSE:To test the access bus to a storage device without the second processing device by providing a test mode FF and its additional circuit in a command decoding part when the system consisting of the first and the second data processing device and the storage device is tested. CONSTITUTION:In case that an instruction is taken out from a storage device 2 when the test mode FF is set, the logical value of a signal on an output terminal 48 of a NAND circuit 43 becomes ''1'', and that on an output terminal 45 of a destination decoder 41 is ''1'' also, and therefore, a priority circuit 22 is accessed. When data read/write is indicated to the storage device 2, the logical value of the signal on the output terminal 48 of the NAND circuit 43 becomes ''0''. As the result, the storage device 2 is accessed through a bus 3, and the storage device is accessed from a passive port 25, and it is unnecessary to use the second processing device 4. |
