发明名称 FILTER CIRCUIT
摘要 PURPOSE:To execute a data processing at the same speed as a TV screen without inserting a memory, by providing (p) pieces of fundamental filter circuits for executing a filtering to picture elements of one line and (q) rows given in a time series by the fundamental filter circuit, and bringing the picture element data of the same row of the adjacent line to filtering. CONSTITUTION:A time series data of one row is inputted to an inputting circuit Din by one picture element data each at every one clock time (d). AT the time t=2(m-3)d, a data a1 inputted by t=0 is inputted to a fundamental filter circuit 100a from a delay circuit 10b, and multiplied by F1-F3 by multipliers 20a-22a, respectively. An output of the multiplier 20a passes through an adder 30a and inputted to a delay circuit 40a. At the time after (d), a picture element data a2 from the circuit 10b is inputted to the circuit 100a, and stored in a delay circuit 41a after the product of a2.F2 has been taken by the multiplier 21a, and the sum of a1.F1 has been taken by an adder 31a. In the same way, furthermore, after (d), a data of a1+F1+a2F2+a3F3 is inputted to a delay circuit 42a. By repeating it, an output data Dout is obtained.
申请公布号 JPS63120380(A) 申请公布日期 1988.05.24
申请号 JP19860267353 申请日期 1986.11.10
申请人 SUMITOMO ELECTRIC IND LTD 发明人 OKAMOTO KENJI;KIDA YASUSHI
分类号 G06T1/20;G06T5/20 主分类号 G06T1/20
代理机构 代理人
主权项
地址