| 摘要 |
<p>PURPOSE:To reduce the power consumption of a 1-chip processor by controlling only a RAM module of small capacity necessary for execution of instructions under an accessable state. CONSTITUTION:A CS 2-1 consisting of plural RAM modules 2 is set to a CSDR 3-3 by an address in an address register 3-1. The contents of the CSDR 3-3 are decoded by an instruction decoder 3-4 for control of the inside of a 1-chip processor 1. A module address comparator 3-31 sets a dummy FF 3-32 in the case of different RAM addresses. Under such conditions, a CS control circuit 3-33 performs control to apply an executing cycle to the access 2 of the RAM module. This RAM module consumes minute power consumption and the FF 3-32 is set when said RAM module is switched to the access of another RAM module. Thus the access is prolonged against the RAM module.</p> |
