发明名称 IMAGE PROCESSOR
摘要 PURPOSE:To shorten the time of the setting of address data to address registers by a controller by providing two address registers which increase or decrease their stored address data by one according to a control signal from the controller. CONSTITUTION:The top address of a readout area of a video memory and the top address of a write area of the video memory are stored in the registers 3 and 5 respectively. Then, the setting of the registers 3 and 5 for reading and writing next image data are performed at the same time by the signal from the controller 4 after the first image processing. Further, when addresses assigned to individual memory cells of the memory 2 consist of N bits, the setting of the address data of the registers 3 and 5 for processing the 2nd and succeeding image data is performed at the same time by the 1st-time control output from the controller even when the amount of data outputted from the controller 4 at the same time is smaller than N bits. Therefore, the setting time of address data is shortened.
申请公布号 JPS59165176(A) 申请公布日期 1984.09.18
申请号 JP19830039574 申请日期 1983.03.10
申请人 MITSUBISHI DENKI KK 发明人 NIMATA TAKASHI;HIRATA TAKAO;MAEDA AKIRA
分类号 G06F12/02;G06F12/06;G06T1/60 主分类号 G06F12/02
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