| 发明名称 |
Logic-circuit layout for large-scale integrated circuits |
| 摘要 |
A VLSI chip has multiple annular rings of circuit cells, interspersed with annular wiring channels for interconecting the cells. Another wiring layer runs perpendicular to the rings. A central chip area contains all the I/O connections for the chip.
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| 申请公布号 |
US4746966(A) |
申请公布日期 |
1988.05.24 |
| 申请号 |
US19850789868 |
申请日期 |
1985.10.21 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FITZGERALD, JOSEPH M.;NGUYEN, PHO H.;WILLIAMS, ROBERT R. |
| 分类号 |
H01L21/822;H01L21/3205;H01L21/82;H01L23/485;H01L23/52;H01L23/528;H01L27/02;H01L27/04;H01L27/118;(IPC1-7):H01L23/48;H01L29/44;H01L29/52;H01L29/60 |
主分类号 |
H01L21/822 |
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