发明名称 SERIAL BUS INTERFACE CIRCUIT
摘要 PURPOSE:To ensure effective connection among various peripheral devices of different transfer formats by switching a data line and the transfer format to each other. CONSTITUTION:When transfer of data is carried out with a slave IC 8, a data line 1 is selected by selectors 3 and 4 for transmission of eight clocks. While a data line 2 is selected for transmission of eight clock pulses when the data transfer is carried out with a slave IC 9. Then a signal A is operated by a clock generating circuit 5 via program processing for transmission of a 9th clock pulse. In such a way, data can be transferred between both IC 8 and IC 9 of different transfer formats.
申请公布号 JPS63118856(A) 申请公布日期 1988.05.23
申请号 JP19860265153 申请日期 1986.11.06
申请人 NEC CORP 发明人 IWAMOTO SHINICHI
分类号 G06F13/38;G06F13/42 主分类号 G06F13/38
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