发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To attain efficient pattern layout by using a connection line between a boosting circuit for selection and a precharge circuit so as to connect a control transistor and a memory transistor (TR) thereby decreasing one wire in number. CONSTITUTION:The precharge circuit 10, a connecting point N, and the TR Q6 and the memory TR Q7 are connected by one connection line C. Thus, the circuit constitution is simplified and an efficient pattern layout is attained. In using one connection line, a high voltage is applied to the TR Q in case of the selection of the decoder, but the gate-source voltage of the TR Q1 is made negative by the application of the high voltage and the TR Q1 is cut off momentarily, then no leakage of the high voltage to a power supply Vcc is caused.
申请公布号 JPS63119097(A) 申请公布日期 1988.05.23
申请号 JP19860264189 申请日期 1986.11.06
申请人 MITSUBISHI ELECTRIC CORP 发明人 ASARI SEIICHIRO
分类号 H01L21/8247;G11C17/00;H01L29/78;H01L29/788;H01L29/792 主分类号 H01L21/8247
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