发明名称 DIGITAL CLIPPER CIRCUIT
摘要 PURPOSE:To attain smooth waveform shaping processing by estimating a digital value at delay period whose phase is delayed with respect to a sampling period of an input digital signal and synthesizing the estimated digital value with the input digital value. CONSTITUTION:An input digital signal is given to an input terminal I at a prescribed sampling period and output signal of the level clipper 21 is the result of each digital value simply clipped at a reference value. On the other hand, an interpolation operating circuit 10 defines a delay period to the sampling period and the delay digital signal comprising an estimated digital value is an input to a level clipper 22. The outputs of the levelclippers 21, 22 are complement to the information and the digital clip signal being an output of a synthesis circuit 30 is subject to smooth waveform shaping processing.
申请公布号 JPS63114375(A) 申请公布日期 1988.05.19
申请号 JP19860258176 申请日期 1986.10.31
申请人 NEC CORP 发明人 HASHI KENJI
分类号 H04N5/20;H04N5/265;H04N9/75 主分类号 H04N5/20
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