发明名称 DIGITAL SIGNAL REPRODUCING CIRCUIT
摘要 PURPOSE:To eliminate a malfunction of an output signal by keeping an output of a comparator constant, when a differential component of a digital signal which has been read is within a prescribed range. CONSTITUTION:When an output signal of a window comparator 4 is '0', an FET 5 is OFF, therefore, a comparator 6 compares an output signal of an integration circuit 2 and a reference voltage 7, an output signal of '0' or '1' is generated, and when the output signal is '1', the FET 5 is ON, therefore, an output of the comparator 6 is fed back to a point (i) and the output becomes constant, that is to say, the output of the comparator 6 immediately before the output signal of the window comparator 4 is varied from '0' to '1' is maintained. At the time of inversion of a digital signal, an absolute value of a differential component is large, therefore, an inversion operation is executed. Also, when a component signal exceeds the reference voltage due to a droop or a noise caused by shortage of a low frequency component compensation of a magnetic head 8, the inversion operation is not executed since an absolute value of its differential component is small, therefore, an output signal of the comparator 6 becomes constant, and a malfunction can be prevented.
申请公布号 JPS63112807(A) 申请公布日期 1988.05.17
申请号 JP19860257738 申请日期 1986.10.28
申请人 FUJITSU TEN LTD 发明人 ASABA KOJI
分类号 G11B5/09;G11B20/10 主分类号 G11B5/09
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