发明名称 SIGNAL SELECTION CIRCUIT
摘要 PURPOSE:To increase degree of freedom of selection in terms of combining signals and to minimize the number of control lines by dividing circuits in a two-signal selection circuit with n-bit width into blocks with 2 Kb and permitting one control line to control each block. CONSTITUTION:The circuit which selects two signal lines A and B and outputs an output Q is constituted as follows: input signals A1-A15 and B1-B15 are selected and outputted to outputs Q1-Q15. The 1st-fourth blocks are constituted so that the 1st block has one output Q1, the 2nd has two outputs Q2 and Q3, the 3rd has four outputs Q4-Q7 and the fourth has eight outputs Q8-Q15. The selection control lines come in four (a)-(d) types. One bit in the 1st block, two bits in the 2nd block, four bits in the 3rd block and eight bits in the fourth block are controlled in a lump.
申请公布号 JPS63110812(A) 申请公布日期 1988.05.16
申请号 JP19860257359 申请日期 1986.10.28
申请人 MITSUBISHI ELECTRIC CORP 发明人 TASHIRO SATORU
分类号 H03K17/00 主分类号 H03K17/00
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