发明名称 FORMATION OF MULTILAYER INTERCONNECTION
摘要 PURPOSE:To ease stepped portion at the connecting portion and realize good electrical connection by forming projecting portion at the lower part of a first wiring layer, exposing the part corresponding to the projecting portion of the insulating layer covering the first wiring layer through an opening of an etching mask layer and forming a second wiring layer thereon. CONSTITUTION:A projecting portion 2 is formed on a lower base layer 1. Next, after a first wiring layer 3 is formed at least covering the projecting portion 2, an insulating layer 4 is formed covering the first wiring layer 3. After formation of insulating layer 4, an etching mask layer 5 is formed on the entire part and an opening 6 is then formed to the etching mask layer 5 at the part corresponding to the projected part 2. Thereafter, the insulating layer 4 is then etched through the opening 6. With this etching process, the anisotropic etching can be conducted. After exposing a part 7 which is in contact therewith by the anisotropic etching, the etching mask layer 5 is removed. Next, a material of the second wiring layer for electrical connection is deposited to the entire part and this is patterned to form a second wiring layer 8.
申请公布号 JPS63111647(A) 申请公布日期 1988.05.16
申请号 JP19860259128 申请日期 1986.10.30
申请人 SONY CORP 发明人 NAKAI MASAMITSU
分类号 H01L23/522;H01L21/768 主分类号 H01L23/522
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