发明名称 CACHE MEMORY
摘要 PURPOSE:To constitute a cache memory system for prefetch with high efficiency by adding a control line to a cache memory LSI to suppress the prefetching actions. CONSTITUTION:All cache memory LSI forming a cache memory system 20 monitor the access requests given from a processor 21 and check whether or not a block to be prefetched exists in its own cache if an access requiring a prefetching action is detected. If said block to be prefetched exists, a prefetch suppressing line 8 is validated. A cache memory LSI 1 which is going to have a prefetching action monitors the line 8 and performs no prefetching action when the line 8 is validated.
申请公布号 JPS63111552(A) 申请公布日期 1988.05.16
申请号 JP19860257481 申请日期 1986.10.29
申请人 NEC CORP 发明人 HORIKAWA TAKASHI
分类号 G06F12/08 主分类号 G06F12/08
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