| 摘要 |
PURPOSE:To omit a useless data fetching action by utilizing the write/read control signals for the data to be observed as a timing signal and controlling the data fetching actions by said control signal. CONSTITUTION:The chips 1 and 2 are connected to the write and read control lines of a device to be observed respectively. While a clip 3 is connected to a data transfer line. A prove 4 stores the data fetched via the clips 3 to a memory 5 of the next stage by utilizing the control signal fetched via the clip 1 and 2 as the timing signal. These data stored in the memory 5 are successively read out by a controller 6 and displayed on a display device 7.
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