发明名称 BURIED GATE TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To make it possible to attain a high speed and take out a large current by a method wherein V-shaped grooves of which Miller indices of the exterior surface are (111)A are formed for a GaAs substrate or layer of which Miller indices of the main surface are (100), and GaAs layers doped with Sn and Si are formed. CONSTITUTION:The title semiconductor device has a construction wherein V-shaped grooves 11 and 12 having exterior surfaces of Miller indices (111)A are formed in a GaAs substrate having a main surface of Miller indices (100), a GaAs layer 4 doped with Si is formed as a gate layer, an n-type region made to grow on said surface of (100) is used as a channel region, a p-type region made to grow on the aforesaid surfaces of (111)A is used as a gate region, and a GaAs layer made to be of an (n) type by doping Sn therein is used as a drain layer and a source layer 5 with the gate layer held between. This construction enables the formation of a thin gate layer.
申请公布号 JPS63111675(A) 申请公布日期 1988.05.16
申请号 JP19860257053 申请日期 1986.10.30
申请人 FUJITSU LTD 发明人 SASA MASAHIKO;FUJII TOSHIO
分类号 H01L29/205;H01L21/20;H01L29/80 主分类号 H01L29/205
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