| 摘要 |
<p>PURPOSE:To obtain the overall test result of a test device in a simple way by securing the interface of test information between processors. CONSTITUTION:The processors 2 and 3 are connected to each other by a system bus and share a shared memory 1. This memory 1 is divided into a reference data block 1a, the transfer destination data blocks 1b and 1c, a synchronizing flag 1d and a test result interface block 1e. The processor 2 which controls the test starts the test with the signal input of an input/output terminal 4 and uses the flag 1d to perform the test of the processor 3 together with its own test.</p> |
