| 摘要 |
PURPOSE:To enable a history control through the use of a compact circuit construction, by providing a history controlling circuit for outputting only data for the current line, for a substantially former half of data, and outputting data obtained by ANDing the data for the current line with inverted data of data for the preceding line, for a substantially latter half of data. CONSTITUTION:For the first half of data, a loading signal L1 is not inputted to a shift register 5a, so that the shift register 5a is in an empty condition, and an inhibition data Q is not outputted. For the second half of the data, the loading signal L1 is inputted to the shift register 5a, and the data for the preceding line is taken into the shift register 5a from a RAM 2. Further, a loading signal L2 causes the data for the current line to be taken into a shift register 5b from the RAM 2. The Q (data obtained by inversion) of the data DA in the shift register 5a and the data DB in the shift register 5b are converted into serial data, and the data obtained by ANDing the two pieces of serial data is outputted, in a shifting manner, to a thermal head 6. |
