| 摘要 |
<p>PURPOSE:To correctly read storing information by providing a circuit for limiting the voltage of a row line selected by a row decoder at the time of reading the information to a voltage between a threshold voltage at the time of a non- writing state and a threshold voltage at the time of writing state. CONSTITUTION:Address signals Al, Am,...An are predecoded by a predecoder 5 and the output is inputted to an inverter constituted of a PMOSFETQ1 and a NMOSFETQ2. The output of the inverter is connected to the row line WXS, the power source of the inverter is supplied from a voltage limit circuit 6. The output VC2 of the circuit 6 is connected to the source of a FETQ1 and either one of supply voltage VCC or the VC2 is impressed to the substrate of the FETQ1. The limit voltage VC2H of the circuit 6 is set to an intermediate value between the threshold voltage at the time of the non-writing state of a nonvolatile semiconductor storing element and the threshold voltage at the time of the writing state. In such a way, the storing information can be correctly read.</p> |
