| 摘要 |
PURPOSE:To attain multiplication in a short arithmetic processing time by preparing a ROM specified at the addresses by 8-bit binary data and stored the multiplied value of numbers indicated by high-order 4 bits and low-order 4 bits respectively, and executing multiplication by using said ROM and two registers. CONSTITUTION:A multiplicand P and a multiplier Q which are indicated as 8-bit binary numbers respectively are divided into the parts A, B of the multiplicand P and the parts C, D of the multiplier Q which are indicated as 4-bit data respectively. The multiplied values of all combinations of these 4-bit binary data A, B; C, D are found out. In case of BXD for instance, respective bits of the divided part B consisting of 4- bit binary data are inputted to the address specification input ports AD7-AD4 of the ROM from the upper bit successively and respective bits of the divided part D consisting of 4-bit binary data are inputted to the address specification input ports AD3-AD0 of said ROM from the upper bit successively to obtain the multiplied values from the output ports C7-C0. In the same manner, respective multiplied values of AXD, BXC and AXC are found out. On the basis of BXD, AXD and BXC are shifted by 4 bits respectively. AXC is shifted by 8 bits and these shifted values are added to obtain the multiplied value. |
