发明名称 |
Power saving intermittently operated phase locked loop |
摘要 |
In an intermittently operative phase-locked loop, in order to prevent the oscillator frequency from significantly changing at the time of turning on of an electric power source, a point in time at which a phase difference between clock signals respectively fed to a reference frequency divider and to a frequency divider for dividing the output frequency of a voltage-controlled oscillator becomes substantially zero is detected, and the two frequency dividers are initialized when the above-mentioned point in time is detected after turning on of the electric power source.
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申请公布号 |
US4743864(A) |
申请公布日期 |
1988.05.10 |
申请号 |
US19860922300 |
申请日期 |
1986.10.23 |
申请人 |
HITACHI, LTD;HITACHI VIDEO ENGINEERING, INC. |
发明人 |
NAKAGAWA, JUN'ICHI;KUWAMOTO, YOSHITOMO;KIMURA, HIDEFUMI;WATANABE, HIDEAKI;IENAKA, MASANORI |
分类号 |
H03L7/08;H03L7/14;H03L7/199;(IPC1-7):H03L7/18 |
主分类号 |
H03L7/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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