发明名称 AUTOMATIC FREQUENCY ADJUSTING CIRCUIT
摘要 PURPOSE:To improve the balance of a locking range at high/low intermediate frequency by increasing the voltage fed to the automatic frequency terminal of a tuner section more than the center voltage of a DC voltage outputted from an automatic frequency adjusting (AFT) circuit at all times by manual operation at a fine tuning state. CONSTITUTION:The loop of an AFT circuit 4 is opened by an AFT defeat circuit 5 at fine tuning state, and the intermediate frequency outputted from a tuner section 2 is adjusted minutely by the manual operation. In this case, the voltage of DELTAVAO+DELTAVA is applied to the automatic frequency terminal of the tuner section 2. The voltage DELTAVAO is selected normally to the center voltage (a half of the peak of the output voltage) of the DC voltage outputted from the AFT circuit 4. The voltage DELTAVA is expressed as (DELTAVL/DELTAfL).DELTAfd and DELTAfL/DELTAVL is the AFT control sensitivity of the tuner section 2 and the DELTAfd is the difference between the normal local oscillation frequency and that at detuning. Thus, the positive pull-in frequency range is expanded largely.
申请公布号 JPS63103510(A) 申请公布日期 1988.05.09
申请号 JP19860249257 申请日期 1986.10.20
申请人 FUJITSU GENERAL LTD 发明人 SAKAMOTO KAZUAKI
分类号 H03J7/02 主分类号 H03J7/02
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