发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To reduce noises due to inter-bit-line interference caused by the coupling capacitance between the bit lines by providing a floating bit line between a pair of activated bit lines. CONSTITUTION:Both bit line pairs BL1, BL2 are in a held bit line system and disposed physically in nested state with each other. Hence, when one of the paired bit lines is being activated, the other of the pair goes to a floating state in level 'H' without fail. Also, since the bit line in floating state is present between the main and the auxiliary bit lines of the bit line pair that are activated, the interference between these two bit lines goes to extremely little.
申请公布号 JPS63104296(A) 申请公布日期 1988.05.09
申请号 JP19860251015 申请日期 1986.10.21
申请人 NEC CORP 发明人 HANNAI SEIICHI
分类号 G11C11/401;G11C7/18;G11C11/4097 主分类号 G11C11/401
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