发明名称 TIMER INTERRUPTION PROCESSING METHOD
摘要 PURPOSE:To shorten the interval of the task switching interruptions and to secure the satisfactory response properties by setting the interruption frequency to each of plural interruption processing contents needed in case of a task switching and then executing these processing contents when the generating frequency of the timer interruptions reaches a level corresponding to the prescribed interruption processing contents. CONSTITUTION:An interruption control table is stored in a system memory 20. This control table contains an N counter which counts down the hard interruption number P of a single tick showing the specific interruption frequency applied by a hard timer with which a single task switching interruption process is carried out as well as the interruption frequency of the hard timer, an M(Q) counter which counts down the number Q of phases, the interruption frequency m(Q) for each phase and the number of ticks, and the processing routine address of each phase. Then only the phases that must always be processed for each switch are carried out in the prescribed order. In such a way, the processing time is shortened for task switching interruptions and the overhead of real processing is reduced while keeping the satisfactory response properties for input/output.
申请公布号 JPS63104145(A) 申请公布日期 1988.05.09
申请号 JP19860250359 申请日期 1986.10.21
申请人 FANUC LTD 发明人 TANAKA KUNIO;MORIZAKI KAZUHIKO
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
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