发明名称 LOCK CONTROL SYSTEM
摘要 PURPOSE:To prevent the performance deterioration of a multi-processor by recognizing the failure of a lock request, if occurs, to avoid the repetition of useless lock requests. CONSTITUTION:A lock control system consists of CPUs 1 and 2 which serve as plural processors and a lock control circuit 3. The CPU1 and 2 send a microprogram instruction which is read out of a control storage register 23 and decoded to an execution control part. The circuit 3 recognizes the failure of a lock request, if occurs, and resets a flip-flop 13. Thus the lock request is suppressed repetitively until a lock release signal which gives a lock enable state is received. When a lock request is accepted, a logic ''0'' is delivered to an output line 131. At the same time, the output of the circuit 3 is stored as it is in flip- flop circuits 18 and 19.
申请公布号 JPS59173866(A) 申请公布日期 1984.10.02
申请号 JP19830049254 申请日期 1983.03.24
申请人 NIPPON DENKI KK 发明人 SHIBAZAKI SUSUMU
分类号 G06F12/00;G06F9/46;G06F9/52;G06F13/14;G06F13/16;G06F15/16;G06F15/177 主分类号 G06F12/00
代理机构 代理人
主权项
地址