发明名称 ERROR PREVENTION IN TTL CIRCUITS
摘要 A TTL circuit including an input circuit, an output circuit, elements for controlling the output circuit, and elements for delaying the operation of the controlling elements immediately after the voltage supply is turned on. The output of the TTL circuit is maintained at on "H" level until the voltage supply rises up to a predetermined level.
申请公布号 DE3278304(D1) 申请公布日期 1988.05.05
申请号 DE19823278304 申请日期 1982.11.26
申请人 FUJITSU LIMITED 发明人 SUZUKI, HIROKAZU;AKIYAMA, TAKEHIRO FUJITSU DAI-1 ICHIGAO-RYO
分类号 H03K19/003;H03K17/22;H03K19/088;(IPC1-7):H03K19/003 主分类号 H03K19/003
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