| 摘要 |
A circuit for trimming the offset voltage of a differential amplifier is provided comprising a pair of FET input transistors forming an input stage to the amplifier, and an offset adjustment circuit comprising a temperature-dependent resistive network for reducing post-trim offset voltage drift. The offset voltage is a function of a mismatch between the drain-to-source currents of the inputs transistors. The offset adjustment circuit provides for initial trimming of the offset voltage and automatic post-trim reduction of drift by decreasing this drain-to-source current mismatch to track the decrease in non-controllable device mismatch.
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