| 摘要 |
PURPOSE:To reduce the malfunction and the operating time and to facilitate circuit integration by providing an output voltage clamp circuit and input voltage clamp circuit so as to suppress a droop error with simple constitution thereby suppressing the charging/discharging of a holding capacitor. CONSTITUTION:When a voltage held in a capacitor 3 exceeds a clamp voltage applied to a terminal 1, an input voltage of the amplifier 14 is clamped by a clamp circuit 13 connected to a non-inverting input of an operational amplifier 14 forming the titled sample holding circuit 13, the capacitor 3 is disconnected and it is not charged/discharged by an input bias current. In this case, since an emitter follower circuit 12 for output voltage clamp is connected to an inverting input of the amplifier 14, the effect of level shift by the circuit 13 of the emitter-follower constitution is prevented. Thus, the droop error due to the input bias current is suppressed with simple constitution not using any FET and the charging/discharging of the hold capacitor is suppressed to reduce the malfunction, the operating time is decreased and the circuit integration is facilitated.
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