发明名称 DMA CONTROL CIRCUIT
摘要 PURPOSE:To realize the DMA transfer of a two-dimensional data, and to improve the efficiency of an image processing, by generating a real address in a two-dimensional space designated by one time of start-up. CONSTITUTION:By obtaining the position of an area to be accessed in the two-dimensional space, and the number of bytes to be transferred, from a first register 10 in which a horizontal width WDR of two-dimensional space supplied from a CPU is accumulated, and second registers 11 and 12 in which the horizontal width XLR and the vertical width YLR of the area to be accessed in the two-dimensional space are accumulated, a two-dimensional address generation circuit 3 generates an address in order from the forefront real address of an address register 13. Therefore, it is possible to generate the real address of the area in an arbitrary two-dimensional space designated by one time of start-up.
申请公布号 JPS6398056(A) 申请公布日期 1988.04.28
申请号 JP19860243820 申请日期 1986.10.14
申请人 FUJITSU LTD 发明人 KANEDA HIROYUKI
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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