Adder circuit using decimal 1-out-of-10 code

摘要

The adder circuit according to the subject of the invention differs from the adder circuit according to P 3629739.9 in that the circuit (7) is simplified and improved as much as possible, and consists of only 5 OR circuits (40 to 44) each with two inputs, 10 AND circuits (50 to 59) each with two inputs, and a negating circuit (60). Compared with an exchange circuit, this circuit has 5 fewer OR circuits. <IMAGE>