| 摘要 |
<p>PURPOSE:To ensure transfer of data with no error by selecting automatically a forward phase clock or a reverse phase clock based on the deciding result of a phase deciding circuit. CONSTITUTION:The data on a digital circuit 1A is extracted to a register D2 by a clock A and the phase relation between clocks A and B is decided by a deciding circuit 8. A selecting circuit 7 selects automatically a reverse phase clock -B with the same phase of both clocks A and B, the clock B with reverse phase, and the clock B or -B when the phases of both clocks are shifted from each other. The data written to the register D2 is fetched to a register D3 by the clock selected by the circuit 7 and then fetched to a digital circuit 1B via a register D4 by the clock B. Thus the output data synchronous with the clock B is sent to the circuit 1B with no error.</p> |
