发明名称 SEMICONDUCTOR INTEGRATED LOGIC CIRCUIT
摘要 PURPOSE:To enable a logic circuit conventionally incapable of being tested by a scan pass test to be tested by constituting the logic circuit such that the data terminal of a flip-flop circuit capable of a scan-pass constitution can be changed over to be connected to a plurality of logic circuits. CONSTITUTION:The test of a logic circuit A1 can be performed by conducting a normal operation by throwing-in switches SW11 and SW12 to sides (b) and (c), respectively, and then by conducting a scan pass operation by throwing-in the switch 11 to the side (a) to make flip-flops F11 and F12 a shift register constitution. Likewise, when the switch 12 is thrown-in to the side (a) when the switch SW11 has been thrown-in to the side (b), the test of another logic circuit B1 can be performed by the scan pass operation. Thus, the test of the logic circuit B1 conventionally incapable of the test can be performed.
申请公布号 JPS62169066(A) 申请公布日期 1987.07.25
申请号 JP19860012372 申请日期 1986.01.22
申请人 NEC CORP 发明人 OZAKI HIDEHARU
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
代理机构 代理人
主权项
地址