发明名称 SERVICE INTERRUPTION PROCESSING CIRCUIT
摘要 <p>PURPOSE:To ensure the continuous data processing so far carried out right before a service interruption even after this interruption is recovered, by keeping the address output which is under execution until the voltage drop is recovered when this voltage drop is detected. CONSTITUTION:A gate signal is applied to a buffer BF133 from a control circuit 12 and presence or absence of a timing signal TP is decided. If the presence of the signal TP is confirmed, it is decided that a power supply has a service interruption. Then the gate open signals delivered to gate circuits 141 and 142 from the circuit 12 are reset. Thus the areas between a line l7 and a data bus DB and between a print HBF and a printing part are opened. The power is supplied to a CPU and a memory from a secondary battery 6. Then a gate signal is sent to a buffer BF131 from the circuit 12 and a converter 9 holds the address output which is under execution until the service interruption is recovered and a power drop signal PW has no input any more in case the signal PW is supplied to the converter 9. Then the service interruption is recovered when no signal PW exists.</p>
申请公布号 JPS6393023(A) 申请公布日期 1988.04.23
申请号 JP19870237560 申请日期 1987.09.24
申请人 CASIO COMPUT CO LTD 发明人 KUMAGAI SHO
分类号 G06F1/30;G06F1/00 主分类号 G06F1/30
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