A MAJOR/MINOR LOOP BUBBLE MEMORY SYSTEM

摘要

A major/minor loop bubble memory system includes a passive replicator (34) in the major loop read channel (33) which is connected by a first path (42) to a mode switch-annihilator (44) and a merge point in the major loop write channel (30) and by a second path (36) to an off-chip decision-making means (38) and the merge point in the write channel. The decision-making means (38) is positioned the same or fewer propagation steps than the mode switch-annihilator (44) is from the replicator (34). The decision-making means (38) is activated to cause either the replicated data to pass through the mode switch-annihilator (44) into the write channel or the replicated data to be annihilated in the mode switch-annihilator and the data from a generator (40) to pass into the write channel.