| 摘要 |
PURPOSE:To decrease a variation of a delay time by connecting in series a transistor in which an ON-resistance has each reverse dependency against a variation of a power supply voltage. CONSTITUTION:At a time t2, a precharge signal phip is varied to '0'V, and thereafter, at a time t3, an input signal phi1 is inputted, and when it is varied from '0'V to VDD, a transistor Q4 is turned ON and charging of a nodal point NA is started. Simultaneously, a transistor Q2 is turned ON, therefore, a nodal point NB starts to drop toward '0'V. When a potential NAS of the nodal point NA reaches a prescribed value (time t4), an output signal phi2 is varied from VDD to '0'V by a transistor Q7, and an inversion delay signal phi2 of the input signal phi1 is outputted. When a power supply voltage becomes high, an ON- resistance of a transistor Q1 becomes small, therefore, a drop speed of a potential NBS of the nodal point NB becomes high, and an ON-resistance of a transistor Q3 in which the nodal point NB is a gate becomes large. In this way, as for a series resistance value of ON-resistances of the transistor Q3 and Q4, its power supply voltage dependency becomes small. |
