发明名称 MASTER SLICE INTEGRATED CIRCUIT
摘要 PURPOSE:To constitute a power protective circuit having uniform current driving capacity even when the number of BC rows used for a logic gate varies in a spreading-over type gate array by organizing the power protective circuit of transistors in the BC (basic cell) rows. CONSTITUTION:Transistors in BC rows 12 are extended and shaped up to power wiring regions 13, and a plurality of P and N-type transistors in the BC rows 12 are connected in parallel, thus forming OFF-transistors Q11-Q14 for protection having the same driving capacity as conventional devices. Accordingly, since the transistors in the BC rows 12 are employed as the OFF-transistors for protection, not only the transistors in the BC rows 12 in the power wiring regions 13 are shaped but also power protective transistors are formed in the BC rows 12 shaping logic gates, thus acquiring an OFF-transistor for protection having desired current driving capacity, i.e., a power protective circuit.
申请公布号 JPS6388840(A) 申请公布日期 1988.04.19
申请号 JP19860235041 申请日期 1986.10.01
申请人 MITSUBISHI ELECTRIC CORP 发明人 UEDA MASAHIRO
分类号 H01L27/092;H01L21/82;H01L21/822;H01L21/8238;H01L27/04;H01L27/118 主分类号 H01L27/092
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