发明名称 SYSTEM CONTROL PROCEDURE
摘要 PURPOSE:To simplify and miniaturize constitution by providing a control device with a flip flop (FF) and preparing a signal line for informing a prescribed state and a signal line for sending a control signal. CONSTITUTION:The control device 11 is connected to devices 12A-12C through the signal lines 13, 14. When abnormality is generated in the device 12B e.g., cause data are stored in a first-in first-out (FIFO) memory 16A and an 'L' level signal is sent from the device 12B to the signal line 13. Thereby, the FF 15 is cleared and an 'L' level signal is outputted from an output terminal Q to the signal line 14. Since the 'L' level signal is applied to the devices 12A-12C, the devices 12A-12C are simultaneously stopped at their operation. When detecting the transfer of the output signal of the FF 15 from the 'H' level to the 'L' level, a CPU 2 reads out data from FIFOs 16A-16C by using an address bus 3 and a data bus 4 to detect the abnormal device and its cause and display the detected results in a display device.
申请公布号 JPS6385830(A) 申请公布日期 1988.04.16
申请号 JP19860230785 申请日期 1986.09.29
申请人 TOSHIBA CORP 发明人 ANDO ARATA
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址