发明名称 CONTROL CIRCUIT FOR ACTION MODE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To designate plural action modes without increasing the number of elements by decoding the outputs of (n) pieces of flip-flops which latch the signal levels during an active period of a system clock of the K-th phase and producing an action mode setting signal. CONSTITUTION:The system clocks CP0-CP3 of 4 phases having phase shifts so that the active periods of high levels are never overlap with each other are applied to the clock terminals of flip-flops 5-8. Then these flip-flops latch the signal levels of a control input terminal 4 during the active periods of system clocks. A decoder 3 decodes the outputs of flip-flops 5-8 and produces signals needed for each action mode. Thus 2<4> ways of combination are secured for input signals to be applied to the decoder 3 by supplying the signals synchronizing with system clocks through the terminal 4. As a result, the total number of settable action modes can be increased without increasing the number of exclusive terminals.
申请公布号 JPS6383852(A) 申请公布日期 1988.04.14
申请号 JP19860230345 申请日期 1986.09.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANAKA KEISUKE
分类号 G06F11/22;G06F12/14;G06F15/78;G06F21/24;G11C17/00 主分类号 G06F11/22
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