| 摘要 |
A standard JFET or MESFET with a second gate is described. The second gate underlies the channel region, but is accessible from the same surface of the semiconductor body as are the other terminals of the transistor. Electrical signals are transmitted to the second gate by a heavily doped interconnect region. Isolation techniques prevent a voltage applied to this second gate from having a significant effect on adjoining electronic devices. Also described is a process for manufacturing such transistors using only steps which are present in a typical bipolar processing sequence.
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