发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To decrease the number of wirings for signal pins to one from two, and to lessen the total number of wirings for the whole substrate by connecting memory elements having the pin arrangement of specular symmetry and the same function near a connecting land for the signal pins each faced to both surfaces of the substrate through through-holes. CONSTITUTION:A normal DRAM element 1 is mounted onto the upper surface of a printed substrate 2, and a DRAM 3 having the pin arrangement of specular symmetry to the DRAM element 1 and the same function is mounted onto the lower surface. When the DRAM elements 1 and 3 are faced oppositely at that time, control signals CAS, WE and address signal terminals A0-A8 are connected through a through-hole 4 because signal pins having each function can be aligned at corresponding positions, and respective signal terminal is connected to another DRAM element by each one wiring. NC represents 'an empty pin' as a popular name in which circuit connection is not conducted. In a wiring pattern (a) on a first layer (the surface), on which the DRAM element 1 is mounted, and a wiring pattern (b) on a second layer (the rear), on which the specular symmetry element 3 to the wiring pattern (a) is mounted, rectangular hatching sections represent soldered-joint terminals for the printed substrate corresponding to pin arrangement and the through-hole connecting sections 4 balloons.
申请公布号 JPS6381973(A) 申请公布日期 1988.04.12
申请号 JP19860225905 申请日期 1986.09.26
申请人 HITACHI LTD 发明人 FUJII TATSUHISA;MIYOSHI TETSUO
分类号 G11C11/401;H01L21/8242;H01L25/10;H01L25/18;H01L27/10;H01L27/108;H05K1/18;H05K3/34 主分类号 G11C11/401
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