发明名称 Semiconductor memory device having improved write-verify operation
摘要 In a semiconductor memory device comprising row decoders, word line drivers, word lines, memory cells, a d.c. power source for a write mode, and a d.c. power source for a read mode, one of the word line drivers comprises a first circuit for supplying a write voltage from the d.c. power source for the write mode to one of the word lines selected by the row decoders when predetermined data is written into one of the memory cells connected to the selected word line and a second circuit for supplying a current from the selected word line to the d.c. power source for the read mode when the predetermined data is to be verified after the predetermined data has been written into one of the memory cells; the second circuit comprises a depletion type transistor and a one-directional conductive element connected in parallel to the depletion type transistor.
申请公布号 US4737936(A) 申请公布日期 1988.04.12
申请号 US19850810633 申请日期 1985.12.19
申请人 FUJITSU LIMITED 发明人 TAKEUCHI, ATSUSHI
分类号 G11C17/00;G11C8/08;G11C16/06;G11C16/08;G11C16/12;G11C29/00;G11C29/12;G11C29/18;(IPC1-7):G11C7/00 主分类号 G11C17/00
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