| 摘要 |
In a data processing machine having a parity checked data path n bits wide, the n bits including a plurality of groups of bits each having at least one data bit and at least one parity bit for the group, and having enabling gates connected to receive the n bits and responsive to a control signal to supply the n bits to the data path, and further including parity checkers for detecting parity errors in the respective groups, the present invention provides an improvement for supplying copies of the control signal to the enabling gates so that the data path parity checkers will detect errors in the control signal copies. The improvement comprises a plurality of power gates connected to receive the control signal at respective inputs and connected to supply respective copies of the control signal to at least one enabling gate supplying a bit in a first of the groups and to at least one enabling gate supplying a bit in a second of the groups.
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