| 摘要 |
PURPOSE:To enable a compound semiconductor single crystal layer having a high quality to be formed efficiently in a relatively short period of time when the compound semiconductor layer is formed on a silicon (Si) substrate, by applying a thermal stress in the middle of the deposition process for improving the crystallinity of the deposited layer. CONSTITUTION:A GaAs layer 32 is first deposited on an Si substrate 31 in two steps until the thickness thereof reaches 2.6 mum without any temperature decreasing cycle. Then, in order to shorten the deposition stopping period, the thermal cycling is designed, for example, such that the initial temperature decreasing rate is about 2 deg.C/second; the lower limit of themperature is 300 deg.C; and the higher limit is 700 deg.C. Ten thermal cycles consisting of such temperature increasing and decreasing cycles are carried out for each 0.1 mum thickness of a deposited layer so that a thermal cycle layer 33 having a thickness of 1.0 mum is formed at a position spaced by 1.3 mum or over in the direction of deposition from the interface between the silicon substrate 31 and the GaAs layer 32. Further, a 1.0 mum thick GaAs layer 34 is deposited at a deposition temperature of 700 deg.C. Thus, by performing the thermal cycle deposition process at a position spaced by 1.3 mum or over in the deposition direction from the interface between the silicon substrate 1 and the GaAs layer 2, the dislocation density can be decreased by ten times or more in comparison with conventional methods. |
