| 摘要 |
PURPOSE:To obtain a DRAM, in which high integration density is implemented, by providing a substrate electrode type grooved memory cell, and electrically connecting capacitor electrodes to the diffusion layer of a MOS transistor on the side surface of a substrate in each groove. CONSTITUTION:A p-type layer 2 is grown on a p<+> type Si substrate 1. Regions which are isolated with a field insulating film 3 as elements are memory cell regions. Capacitor electrodes 8 are embedded in each groove 6 through a capacitor insulating film 7. At a gate electrode 13, n-type diffusion layers 141 and 142 as a source and a drain are formed by a self-aligning mode. Thus an MOS transistor is formed. The capacitor electrodes 8 are electrically connected to the diffusion layers 141 and 11 of the MOS transistor on the upper side surface of each groove 6. |
