发明名称 PROCEDE POUR REDUIRE LES EFFETS DU BRUIT ELECTRIQUE DANS UN CONVERTISSEUR ANALOGIQUE/NUMERIQUE
摘要 Method for reducing deleterious effects of electrical noise in an analog-to-digital converter wherein both the analog and digital circuitry of the A/D converter are embodied in the same integrated circuit. The method includes sampling an analog input voltage with a first clock signal, generating a second clock signal that is delayed with respect to the first clock signal, and using the second clock signal as a clock for the digital circuitry. In accordance with another aspect of the invention, the method for reducing effects of noise in an A/D converter wherein such noise is generated by a digital decimation filter includes synchronously pipelining the arithmetic operations of the digital decimation filter.
申请公布号 FR2604839(A1) 申请公布日期 1988.04.08
申请号 FR19870013769 申请日期 1987.10.06
申请人 CRYSTAL SEMICONDUCTOR CORP 发明人 DAVID JOSEPH KNAPP;NAVDEEP SINGH SOOCH;ERIC JOHN SWANSON
分类号 H03M1/08;H03M3/02;(IPC1-7):H03M1/08 主分类号 H03M1/08
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