摘要 |
<p>To improve the planarisation and the reliability of low-resistance conductor tracks, tungsten is used as via filler (6, 16) and metal silicides as interlayers (5, 9, 19) in the multilayer interconnection of integrated semiconductor circuits having at least two metallisation levels (8, 18) consisting of aluminium or an aluminium compound. The metallisation system according to the invention contains a nucleation layer (7, 17) preferably consisting of titanium/titanium nitride as lower layer for each metallisation level (8, 18), the resistance of the aluminium layers (8, 18) to electromigration thereby being increased, and a layer (9, 19) preferably consisting of molybdenum silicide as top layer for each metallisation level (8, 18), the low resistance of the metallisation (8, 18) thereby being improved. In addition, the sandwich-type metallisation structure improves the planarity and the thermal stability of the circuit. Since the number of metallisation layers (8, 18, 28) is optional, the invention can be used for VLSI circuits. …<IMAGE>… </p> |