发明名称 MULTICHIP INTEGRATED CIRCUIT PACKAGING CONFIGURATION AND METHOD
摘要 <p>A multichip integrated circuit package comprises a substrate (10) to which is affixed one or more integrated circuit chips (15a, 15b, 15c) having interconnection pads (16). A polymer film (20) overlying and bridging integrated circuit chips present is provided with a plurality of via openings to accommodate a layer of interconnection metallization (25) which serves to connect various chips and chip pads within the interconnection pads disposed on the chips. A significant advantage of the packaging method and configuration of the present invention is the ability for the polymer film to be removed. This significantly improves testability and effectively provides wafer scale integration circuit packages which are free of problems associated with yield and testability.</p>
申请公布号 WO1988002552(A1) 申请公布日期 1988.04.07
申请号 US1987002294 申请日期 1987.09.14
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