| 摘要 |
PURPOSE:To output past data in the sequence of a time series by inputting one address each ahead, shifting the stored data and making always the data of the same delay quantity exist at the same address when plural past data are successively outputted each time new data are inputted. CONSTITUTION:A memory means 1 executes the reading and writing by an address designation. A reading address generating means 2 generates a reading address from a prescribed starting address to a prescribed end address each time data are inputted and outputs it to the memory means 1. A writing address generating means 3 delays the same address as the reading address for a constant time and outputs it as the writing address. A control means 4 controls to write the read data into one address ahead excluding one starting address and write new data into a final address. Thus, the data of the same delay time are always stored to the input data and outputted in the sequence of the time series side by side when respective addresses are successively read. |
