| 摘要 |
The method includes the steps of forming a 1st gate oxide film (23) and a nitride film (25) on the semiconductor substrate (21), exposing the substrate partially to form a 2nd shallow gate oxide film (27), forming a 1st poly-Si layer (29) thereon, polishing or etching-back the layer (29) to remove the film (25) to self align the layer (29), forming a low concentration of ion implanting region (31) by using the layer (29) as a mask, forming a 2nd poly-Si layer (33) and an oxide film thereon, etching-back the oxide film to form a spacer (35), and removing the exposed layer (33) to implant impurities with high concentration to form a source and drain region (41), thereby reducing the capacitor size between the poly-Si layers (29,33) and gate oxide film (27) to improve the signal transmission ratio.
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