| 摘要 |
The method includes the steps of sequentially forming a poly-Si film (1), an oxide film (2), a nitride film (3) and a poly-Si film (4) on the substrate; growing and etching an oxide film (6) to define a device size; forming a trench isolation region (7) and poly-Si electrodes (8,9,10), depositing and etching an LPCVD oxide film thereon to expose the poly-Si films (4,8) to form a trench isolation oxide film (12) to remove the film (4) to form an unactive base electrode (25) with boron doping, growing an oxide film (13) on the electrode (25); removing a nitride film (3) to form diffusion layers (14,15,16,17), and forming a self aligned silicide layer (18) and metallic wirings on the electrode (25,26,27); thereby reducing the parasitic resistance component.
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