发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To suppress the transfer of invalid data by allowing a direct memory access (DMA) control means receiving a command for temporarily stopping data transfer to stop the continuous transfer of the succeeding data group after ending the transfer of a transferring data group. CONSTITUTION:Receiving a temporary stop command of data transfer from a data transfer stop commanding means 300 in a processor 1 during the continuous transfer of plural data groups 100 by a DMA control means 200, a data transfer stopping means 400 ends the transfer of a transferring data group 100 and then stops the continuous transfer of the succeeding data group 100. Thereby, only the complete data group 100 is transferred before the stop of the transfer. Consequently, all the transferred data are validated and the transfer of invalid data can be suppressed.
申请公布号 JPS6376043(A) 申请公布日期 1988.04.06
申请号 JP19860222757 申请日期 1986.09.19
申请人 FUJITSU LTD;FUJITSU DAIICHI TSUSHIN SOFTWARE KK 发明人 NARA TAKASHI;HATANO TAKASHI;KAWATO YUTAKA;SHIOMITSU TSUTOMU;SHIBATA MEGUMI
分类号 G06F13/28 主分类号 G06F13/28
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